Toshiba

Description

Oct 2, 2012 1/16. 16. 74LCX125 . Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs. Datasheet production data. Features. Aug 28, 2013 The 74LCX125 logic buffer can tolerate. 5V signal from the MPU/MCU, and the FT800 input signals are limited to 3.3V. Figure 4-3 SPI Interface 74LCX125 . U9. 1. 74LCX125 . U5. 1. 74LCX14. C11. +. C5. +. C57. +. C61. +. R122. R123. R128. R127. R113. R124. R114. C50. +. C46. +. C51. +. RN2. 1. RN1. Aug 28, 2013 74LCX125 . 3V3. GND. FT800_SCK. FT800_MOSI. FT800_CS#. FT800_MISO. MISO. CS#. SCK. VCC. 14. A1. 2. GND. 7. OE1. 1. Y1. 3. A2. 5. Aug 16, 2013 74LCX125 . 3V3. GND. FT800_SCK. FT800_MOSI. FT800_CS#. FT800_MISO. MISO. CS#. SCK. VCC. 14. A1. 2. GND. 7. OE1. 1. Y1. 3. A2. 5.